Northrop Grumman Cryogenic Electronics Publication

Abstract of Paper Presented at the Applied Superconductivity Conference
Palm Desert, California, September 13-18, 1998
Submitted to IEEE Trans. Appl. Superconductivity

Dewar-to-Dewar Data Transfer at 2 Gigabits per Second

J. X. Przybysz, J. D. McCambridge, and P. D. Dresselhaus

View full paper using Adobe Acrobat Reader. This work has been submitted to the IEEE for possible publication. Copyright may be transferred without notice, after which this version may no longer be accessible.

Abstract - Josephson digital circuits have been designed, fabricated, and demonstrated to pass GHz-rate data from a chip in one cyrostat to a chip in another cyrostat with no semiconductor amplifiers in the data signal line. A Hewlett Packard data source provided the original data to the first chip, which converted it to SFQ data. Output interface circuits were driven by a 2-GHz external clock to latch series strings of 10 junctions and drive 2-Gb/s data into a 50-ohm cable. In the second cyrostat, a latching three-junction interferometer with a two-turn control line converted the input signal to latched data and switched an MVTL OR-gate output. This demonstration showed that low-power Josephson digital circuits can be integrated into multichip digital subsystems that can pass data at high rates without the use of power-hungry semiconductor amplifiers.


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